1. Field of Invention
The present invention relates to a manufacture method for a semiconductor device. More particularly, the present invention relates to a fabrication method for a semiconductor device with a locally strained channel.
2. Description of Related Art
The metal-oxide-semiconductor (MOS) transistor is an important device applied in very-large-integrated-circuits such as microprocessors and semiconductor memories. In addition to a gate oxide layer and a conductive gate structure, the MOSFET transistor further includes a source/drain region having a conductivity type opposite to that of the substrate.
FIG. 1 illustrates the cross-sectional view of a prior-art semiconductor device structure. As shown in FIG. 1, the prior art structure comprises a substrate 100, a gate oxide layer 102, a gate structure 104 and a source/drain region 106. The gate oxide layer 102 is disposed on the surface of a portion of the substrate 100, while the gate structure 104 is disposed on the gate oxide layer 102. The source/drain region 106 is arranged at both sides of the gate structure 104 in the substrate 100.
To enhance the device performances, a silicon layer, which has received a tensile strain, is sometimes used as a channel. Strained silicon layer is the result of biaxial tensile stress induced in silicon grown on a substrate formed with a material whose lattice constant is greater than that of silicon, for example a silicon germanium layer. Strained silicon is shown to modify the electron or hole mobility of the silicon layer, which in turns affect the performance of a device. Larger enhancements of electron or hole mobility require a higher amount of strain.
Moreover, to increase the number of components per IC chip, the device dimensions must be scaled down. As the device dimension continues to shrink, the source/drain regions also become smaller. The smaller the source/drain region is, the higher is the resistance, thus reducing the current of the device and inducing over loading. However, if the junction depth of the source/drain region is increased to improve the aforementioned problems, new issues, including short channel effects and junction leakage, can arise. On the other hand, if heavy dosage implantation is used to reduce the resistance, solid solubility limitation may hamper application of heavy dosage implantation for forming shallow junction for the source/drain regions. In the prior art, the shallow junction source/drain region is coupled with shrunk spacers for preventing short channel effects. However, the resulted silicided shallow junction may lead to unacceptable junction leakage and further increase the junction resistance.